1. Field of the Invention
The invention relates to the field of Group III-Group V compound semiconductor devices and more particularly to dielectric insulators and passivators for such devices.
2. Prior Art
High quality dielectric and surface passivation layers in intimate contact with the semiconductor surface are needed in modern semiconductor devices in order for such devices to achieve their full potential. In the absence of such dielectric layers the performance of devices is severely limited by large interface state densities, excessive surface recombination currents, excessive surface carrier generation and varying surface potentials.
The vast variety of silicon semiconductor devices presently available is in large part a result of the excellent surface passivation characteristics of thermally grown silicon dioxide which provides a stable uniform surface potential at the semiconductor-dielectric interface while minimizing detrimental surface effects such as surface carrier recombination and generation. Thermally grown silicon dioxide may be characterized as a native passivation layer because the silicon therein is derived from the surface of the silicon on which it is grown, rather than being externally supplied.
III-V compound semiconductors have material characteristics which are substantially superior to those of silicon for many device applications, including very high frequency devices and solar cells. However, this superiority cannot be fully exploited without high quality passivation dielectrics. Unfortunately, unlike silicon, III-V compound semiconductors, with the exception of gallium arsenide phosphide, when exposed to thermal oxidation conditions do not produce a satisfactory passivating dielectric.
Thermal oxidation has been successfully utilized to grow a native dielectric on the III-V semiconductor material--gallium arsenide phosphide (GaAsP). Thermal oxidation of GaAsP produces gallium-phosphate-oxide [gallium phosphate (GaPO.sub.4) containing some gallium oxide (Ga.sub.2 O.sub.3)].
Thermal oxidation is unsuccessful with most other III-V compounds because many III-V compound semiconductors decompose into their constituent elements at temperatures below those required for thermal oxidation. For example, gallium arsenide, (GaAs) decomposes into gallium and arsenic at about 700.degree. C. in an oxidizing environment and evolves arsenic trioxide (As.sub.2 O.sub.3) which is volatile at that temperature. Further, thermal oxidation of many III-V compound semiconductors produces a crystalline oxide. A crystalline dielectric does not make a good passivation layer for a semiconductor because the crystalline nature of the dielectric allows current conduction through the dielectric.
Because of its optical and electrical properties gallium arsenide is one of the most attractive III-V compound semiconductors for device applications. Thermal oxidation of gallium arsenide produces gallium oxide (Ga.sub.2 O.sub.3) which is crystalline, rather than amorphous in character and consequently is an inadequate surface passivator. Anodic oxidation processes using room temperature wet chemical oxidation have been utilized to provide native dielectric layers on gallium arsenide (GaAs). However, the resulting dielectrics are bias and temperature sensitive and consequently are inadequate for many applications. Furthermore, the anodic oxides have been found to be chemically reactive with water (H.sub.2 O) thus limiting their application.
In consequence of the unavailability of adequate native dielectric surface passivators for most III-V compound semiconductors, including gallium arsenide, the art utilizes deposited dielectrics such as silicon dioxide (SiO.sub.2) and silicon nitride (Si.sub.3 N.sub.4) for passivation. However, these dielectrics prevent the resulting devices from achieving their full potential because of the higher interface state density and poor surface passivation which result in excessive carrier generation-recombination at the semiconductor-dielectric interface and yield variable surface potentials.
Formation of GaAsP by ion implantation of phosphorous into gallium arsenide has been reported in the literature.
A good surface passivator is needed which is of general applicability to III-V semiconductors.